1. Field
Example embodiments described herein relate to semiconductor devices and methods of manufacturing the same. More particularly, example embodiments described herein relate to semiconductor devices having via structures and methods of manufacturing the same.
2. Description of the Related Art
To facilitate the increased integration of semiconductor devices, three-dimensional packaging technology, in which a plurality of chips are stacked on each other, has been developed. Through silicon via (TSV) technology is a packaging technology in which a via hole is formed through a silicon substrate, and a via electrode is formed in the via hole.
In order to electrically connect a chip having a TSV therein to another chip, a conductive bump may be formed to contact the TSV. To accomplish this, after a back side of a silicon substrate in which the TSV is formed has been partially removed to expose the TSV, a pad structure may be formed on the TSV, and the conductive pad may be disposed on the pad structure. However, when an etching process is performed to form the pad structure, a seed pattern at a lower portion of the pad structure may be over etched, which can expose a portion of a top surface of a protection layer covering a sidewall of the TSV. Thus, external moisture may permeate into the protection layer through the exposed top surface thereof, which can hurt the reliability of the semiconductor device and a semiconductor package including the semiconductor device.